1. Field of the Invention
The present invention relates to the field of power electronics. It relates in particular to a power semiconductor component with switch-off facility in which
a plurality of unit cells are arranged next to each other and connected in parallel in a semiconductor substrate between an anode and a cathode; PA1 each of said unit cells is constructed as a MOS-controlled thyristor (MCT=MOS Controlled Thyristor) which can be switched off by means of a field-effect-controlled short circuit; and PA1 means are additionally provided which ensure the field-effect-controlled switching-on of the component. PA1 the additional means comprise further unit cells which are arranged between the MCT unit cells and are connected in parallel with the latter; and PA1 each of the further unit cells has the structure of a bipolar transistor with insulated gate (IGBT). PA1 each MCT unit cell comprises, between the anode and the cathode, a layer sequence composed of a p.sup.+ -doped p-type emitter layer, an n-doped n-type base layer, a p-doped p-type base layer and an n.sup.+ -doped n-type emitter region with laterally adjacent n-doped channel regions and embedded p.sup.+ -doped source regions; PA1 in the MCT unit cell, the source regions, the channel regions and the p-type base layer emerge next to each other at the cathode-side surface of the semiconductor substrate and in each case form a p-channel MOSFET with an insulated gate electrode situated above it; PA1 each IGBT unit cell comprises, between the anode and the cathode, a layer sequence composed of p.sup.+ -doped p-type emitter layer, an n-doped n-type base layer and a p.sup.+ -doped p.sup.+ -type region with laterally adjacent p-doped channel regions and embedded in n.sup.+ -doped source regions; PA1 in the IGBT unit cells, the source regions, the channel regions and the n-type base layer emerge next to each other at the cathode-side surface of the semiconductor substrate and in each case form an n-channel MOSFET with an insulated gate electrode situated above it; and PA1 the p-type emitter layers and the n-type base layers of both elementary cells are in each case part of a common p-type emitter layer or n-type base layer respectively extending laterally over the semiconductor substrate.
Such a component is known, for example, from the paper by V. A. K. Temple, IEEE Trans. Electron Devices, ED-33, pages 1609-1618 (1986).
2. Discussion of Background
For some years, the development of MOS-controlled components has been increasingly accelerate in power electronics. This trend was initiated by the unipolar power MOSFETs having DMOS structure.
The advantage of these MOS-controlled components is based mainly on the high input impedance of the gate electrode. This makes it possible to trigger the component with a comparatively low expenditure of power.
The DMOSFETs have, however, a serious disadvantage: because of the unipolar nature of conduction, high breakdown voltages have to be paid for in these components with high on-state resistances which limit the maximum current level.
A solution has recently been provided for this problem by the IGBT (Insulated Gate Bipolar Transistor) (on this point see B. J. Baliga et al., IEEE Trans. Electron Devices, ED-31, pages 821-828 (1984)).
The IGBT has a cathode structure which is largely similar to that of the DMOSFET. In a simplified manner, it can be thought of as a cascade circuit comprising a DMOSFET and a bipolar transistor. As a consequence of the bipolar current transfer in the high-resistance n-type base layer, this region is conductivity-modulated; consequently, a low value can be achieved for the onstate resistance even in the case of components with high reverse voltage.
It has now furthermore been proposed to achieve the concept described of controlling the power semiconductor components by means of MOS gates even in the case of components of the highest power class, namely in the case of thyristors (on this point see the paper mentioned in the introduction by V. A. K. Temple).
In such a MOS controlled thyristor or MCT (MOS Controlled Thyristor), which comprises a plurality of parallel-connected unit cells situated next to each other, switching-off is achieved by means of short-circuiting the emitter to the p-type base by means of switchable emitter shorts. For this purpose, MOSFETs which are integrated with the emitter and which can naturally be constructed optionally as n- or p-channel MOSFETs are used as switches.
With a view to simple circuit engineering, it is naturally desirable to use the MOS gates not only to switch the thyristor off but also to switch it on. This should be attainable, if possible, with a single gate electrode.
A structure which fulfills these requirements has already been proposed in the paper by V. A. K. Temple (FIG. 5 therein). This is a combined switch-on and switch-off cell in which a further DMOS structure is used inside the original MCT unit cell in order to inject electrons into the n-type base layer via a channel in the p-type base layer pulled up to the substrate surface.
These known combined switch-on and switch-off cells, however, raise two problems;
The channel of the DMOSFET used to switch on, is formed by the p-type base layer which is pulled to the surface. For typical thyristors, the depth of the p-type base layer varies in the range of at least 20 micrometres. This dimension therefore corresponds approximately to the channel length of the DMOSFET. It is consequently considerably larger than the typical channel lengths of IGBTs, which are approximately 1 micrometre. Owing to the large channel length, fewer electrons are injected into the n-type base layer, which impedes the efficient build-up of a plasma during switch-on and prolongs the switch-on time.
On the other hand, the use of combined switch-on and switch-off cells has the consequence that at most just as many switch-on elements as switch-off elements are present in the component. There is therefore no possibility of optimizing the number and distribution of these elements independently of each other in relation to the requirements imposed on the component.